MOS Transistor Theory

Introducing Dopants (impurities) Increasing Pressure Decreasing Temperature Deformation of Lattice Holes Negative ions Electrons Positive ions Holes Negative ions Electrons Positive ions N-type source, n-type drain and p-type bulk N-type source, p-type drain and p-type bulk P-type source, n-type drain and n-type bulk P- type source, p-type drain and n-type bulk Metal oxide Silicon dioxide Poly Silicon oxide Oxides of Non metals Gate to source voltage Gate current Source Voltage None of the mentioned Channel of negative carriers Channel is not formed Channel is clipped Channel of positive carriers Gate is applied with positive voltage Gate is grounded Gate is applied with negative voltage Gate is connected to source Fast switching time Low power loss Smaller overall layout area All the mentioned Source of both transistor Drains of both transistor Drain of n-MOS and source of p-MOS Source of n-MOS and drain of p-MOS Output is same Output is reversed Output is always high Output is always low 0 VDD (VDD-VOL)/R VDD (VDD-VOL)/2R VDD (VDD-VIH)/2R Keep load transistor in cutoff region Keep load transistor in linear region Keep load transistor in saturation region None of the mentioned Enhancement mode n-MOS transistor and depletion mode p-MOS transistor Enhancement mode p-MOS transistor and depletion mode n-MOS transistor Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor Drain of n-MOS transistor and ground Source of p-MOS transistor and ground Source of n-MOS transistor and source of p-MOS transistor Gate of p-MOS transistor and Gate of n-MOS transistor