RISC Architecture

This is an MCQ-based quiz on the topic of RISC Architecture.

This includes Reduced Instruction Set Architecture (RISC), Complex Instruction Set Architecture (CISC), Characteristic of RISC, Example, and many more.

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Which of the following processor belongs to hybrid RISC-CISC architecture?

Intel Pentium III Intel Itanium 64 AMD’s X86-64 All of the mentioned

The additional functionality that can be placed on the same chip of RISC is

Memory management units Floating point units Memory management and floating point arithmetic units RAM, ROM

The number of clockcycles that take to wait until the length of the instruction is known in order to start decoding is

0 1 2 3

The advantage of RISC processors is

Can operate at high clock frequency

Shorter design cycle

Simple and fast

All of the mentioned

In order to implement complex instructions, CISC architectures use

Macroprogramming

Hardwire

Microprogramming

None

Which of the following is an application of RISC architecture by adding more instructions?

Multimedia applications

Telecommunication encoding

Image conversion

All of the mentioned

The feature of hybrid CISC-RISC architecture is

Consume a lot of power

Not applicable to mobile applications

Processed by RISC core

All of the mentioned

The feature of RISC that is not present in CISC is

Branch prediction

Pipelining

Branch prediction and pipelining

None

The RISC architecture is preferred to CISC because RISC architecture has

Simplicity

Efficiency

High speed

All of the mentioned

The disadvantage of CISC design processors is

Low burden on compiler developers

Wide availability of existing software

Complex in nature

None

The number of CPIs(Clock Per Instruction) for an instruction of RISC processors is

0 1 2 3

The RISC processors that support variable length instructions are from

Intel Motorola AMD Intel and Motorola

Which of the following is true about register windowing?

Chips expose 32 registers to programmer

Puts demands on multiplexers

Puts enormous demands on register ports

All of the mentioned

Which of the following is not true about RISC processors?

Addressing modes are less

Pipelining is key for high speed

Microcoding is required

Single machine cycle instructions

The register window is used to point the number of physical registers is

Infinite

That are currently used

Finite

That are unused

Quiz/Test Summary
Title: RISC Architecture
Questions: 15
Contributed by:
NEO