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This set of MCQs helps students to learn about Validation in Embedded system which provides a product that meets its requirements where the execution of code is necessary either in isolation for unit tests or in various stages of integration. Automating these suites of tests is a huge time saver for embedded software development and also validation requires execution on target hardware.
Which is a top-down method of analyzing risks?
Which gate is used in the geometrical representation, if a single event causes hazards?
Which analysis uses the graphical representation of hazards?
Which gate is used in the graphical representation, if several events cause hazard?
Which of the following is a set of specially selected input patterns?
Test pattern
Debugger pattern
Bit pattern
Byte pattern
Which is applied to a manufactured system?
Bit pattern
Parity pattern
Test pattern
Byte pattern
Which of the following is based on fault models?
Alpha-numeric pattern
Test pattern
Bit pattern
Parity pattern
Which is also called stuck-at model?
Byte pattern
Parity pattern
Bit pattern
Test pattern
How is the quality of the test pattern evaluated?
Fault coverage
Test pattern
Size of the test pattern
Number of errors
What is DfT?
Discrete Fourier transform
Discrete for transaction
Design for testability
Design Fourier transform
Which of the following is also known as boundary scan?
Test pattern
JTAG
FSM
CRC
What does BILBO stand for?
Built-in logic block observer
Bounded input bounded output
Built-in loading block observer
Built-in local block observer
What does BILBO stand for?
Built-in logic block observer
Bounded input bounded output
Built-in loading block observer
Built-in local block observer
What is CRC?
Code reducing check
Counter reducing check
Counting redundancy check
Cyclic redundancy check
What is FSM?
Fourier state machine
Finite state machine
Fast state machine
Free state machine
What is FTA?
Free tree analysis
Fault tree analysis
Fault top analysis
Free top analysis
