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This set of MCQs helps students to learn about 32-bit processors-80386, 80387 and 80486, which hold several distinct advantages over radiation-hardened microprocessors. These include reducing both cost and design time for spaceflight missions. This is accomplished by being industry-standard as well as commercially available devices with many commercial off-the-shelf (COTS) software applications, development tools, and operating systems.
The 80386 in protected mode, supports all software written for
The control register that stores the 32-bit linear address, at which the previous page fault is detected is
The 80386DX is a processor that supports:
8-bit data operand
16-bit data operand
32-bit data operand
All of the mentioned
The 80386DX has an address bus of,
8 address lines
16 address lines
32 address lines
64 address lines
The number of debug registers that are available in 80386, for hardware debugging and control is :
2
4
8
16
The memory management of 80386 supports,
Virtual memory
Paging
Four levels of protection
All of the mentioned
The 80386 consists of :
On-chip address translation cache
Instruction set of predecessors with upward compatibility
Virtual memory space of 64TB
All of the mentioned
80386DX is available in a grid array package of,
64 pin
128 pin
132 pin
142 pin
The operating frequency of 80386DX is :
12 MHz and 20 MHz
20 MHz and 33 MHz
32 MHz and 12 MHz
All of the mentioned
The 80386 in its protected mode, in its virtual mode of operation, can run the applications of :
8086
80286
80287
80387
The size of the pages in the paging scheme is :
Variable
Fixed
Both variable and fixed
None
To convert linear addresses into physical addresses, the mechanism that the paging unit uses is
Linear conversion mechanism
One level table mechanism
Physical conversion mechanism
Two level table mechanism
Which of the following is not a component of paging unit?
Page directory
Page descriptor base register
Page table
Page
The advantage of pages in paging is
No logical relation with program
No need of entire segment of task in physical memory
Reduction of memory requirement for task
All of the mentioned
