VLSI Design & Technology

This is an MCQ-based quiz on VLSI Design & Technology.

This includes System Partitioning, Pre-layout Simulation, Logic cell, and Post-layout Simulation.

Start Quiz

______ is used in logic design of VLSI.

LIFO FIFO FILO LILO

After an initialization phase, the simulator enters the ______phase.

Compilation Elaboration Execution None of the above

Which concept proves to be beneficial in acquiring concurrency and order independence?

Alpha delay Beta delay Gamma delay Delta delay

Which functions are performed by static timing analysis in simulation?

Computation of delay for each timing path Logic analysis in a static manner Both a and b None of the above

What is/are the necessity/ies of Simulation Process in VHDL?

Requirement to test designs before implementation & usage Reduction of development time Decrease the time to market All of the above

An Assert is ______ command.

Sequential Concurrent Both a and b None of the above

Which among the following EDA tool is available for design simulation?

OrCAD ALDEC Simucad VIVElogic

Why is multiple stuck-at fault model preferred for DUT?

Because single stuck-at fault model is independent of design style & technology Because single stuck-at tests cover major % of multiple stuck-at faults & unmodeled physical defects Because complexity of test generation is reduced to greater extent in multiple stuck-at fault models All of the above

Why is the use of mode buffer prohibited in the design process of synthesizer?

To avoid mixing of clock edges To prevent the occurrence of glitches & metastability Because critical path has preference in placement Because Maximum ASIC vendors fail to support mode buffer in librari

VLSI technology uses ________ to form integrated circuit.

Transistors

Switches

Diodes

Buffers

The difficulty in achieving high doping concentration leads to ____________

Error in concentration

Error in variation

Error in doping

Distribution error

Medium scale integration has ____________

Ten logic gates

Fifty logic gates

Hundred logic gates

Thousands logic gates

_________ is used to deal with effect of variation.

Chip level technique

Logic level technique

Switch level technique

System level technique

As die size shrinks, the complexity of making the photomasks ____________

Increases

Decreases

Remains the same

Cannot be determined

______ architecture is used to design VLSI.

System on a device

Single open circuit

System on a chip

System on a circuit

Which provides higher integration density?

Switch transistor logic

Transistor buffer logic

Transistor transistor logic

Circuit level logic

Physical and electrical specification is given in ____________

Architectural design

Logic design

System design

Functional design

Which is the high level representation of VLSI design?

Problem statement

Logic design

HDL program

Functional design

In VHDL, which class of scalar data type represents the values necessary for a specific operation?

Integer types

Real types

Physical types

Enumerated types

Which among the following is pre-defined in the standard package as one-dimensional array type comprising each element of BIT type?

Bit type

Bit_vector type

Boolean type

All of the above

Quiz/Test Summary

Title: VLSI Design & Technology

Questions: 20

Contributed by:

Diego Wed, Apr 20, 2022 07:36 AM UTC

Book a Trial Class

Related Quizzes

Analog Electronics

Transistor Biasing

Regulated DC Power Supply

Transistor Audio Power Amplifiers

Mobile Communication